Analog/RF and Mixed-Signal Circuit Systematic Design by Michael Eick, Helmut Graeb (auth.), Mourad Fakhfakh, Esteban

By Michael Eick, Helmut Graeb (auth.), Mourad Fakhfakh, Esteban Tlelo-Cuautle, Rafael Castro-Lopez (eds.)

Despite the truth that within the electronic area, designers can take complete advantages of IPs and layout automation instruments to synthesize and layout very complicated platforms, the analog designers’ activity continues to be regarded as a ‘handcraft’, bulky and intensely time eating method. therefore, super efforts are being deployed to strengthen new layout methodologies within the analog/RF and mixed-signal domain names.

This booklet collects sixteen state of the art contributions dedicated to the subject of systematic layout of analog, RF and combined sign circuits. Divided within the components Methodologies and strategies contemporary theories, synthesis options and layout methodologies, in addition to new sizing techniques within the box of sturdy analog and combined sign layout automation are provided for researchers and R/D engineers.

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G. transformer synthesis), the synthesis of mm-wave RF linear amplifiers brings new challenges, which make the MMLDE algorithm not workable for this problem. This is also called the “curse of dimensionality” in surrogate model assisted evolutionary algorithms. 6 provides an example). g. 5 dimensions) very efficiently. g. [20],[23]). When the number of dimensions increases, two challenges appear. (1) Solution quality: an initial surrogate model that can roughly approximate the performance of the circuit is often difficult to construct with a reasonably small number of initial samples.

All the transistors have the same size to make sure that each stage can drive the next stage. All the transistors have 1 μ m width, 90nm length and 15 fingers as in [25]. In a cascaded multi-stage RF amplifier with the same transistor 2 Efficient Synthesis Methods for High-Frequency Integrated Passive Components 47 size, the optimal design parameters of the transformers often do not differ much from one stage to the other. Indeed, the typical manual design method of copying the design of one stage to construct the whole amplifier achieves less optimal results.

When the performance optimization is based on linear analysis, usually the most critical problem is the impedance matching, and the transistors often have clear design rules. For example, a typical method is to use the minimum transistor length and a fixed width, while only the number of fingers is changed. In addition, the transistor layout is decided before any other components in many high-frequency amplifier designs. Hence, we first extract the parasitics of the transistors with different number of fingers but with fixed width and length beforehand and then directly use the extracted models in full-fletched optimization.

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